Many modern computers have multiple processors or cores that share memory. One challenge with multiple processors is how to permit the multiple processors to share memory.
A synchronization facility allows modification of multiple memory locations (often called a “working set”) by a single region of instructions (often called a “speculative region”) executed by a single processor. The synchronization facility allows a speculative region to access the working set of memory locations, while watching the working set to detect accesses from other speculative regions being executed by other processors.
If another processor accesses a memory location of the working set, then the synchronization facility determines that there is a conflict and aborts one of the speculative regions. This enables the cores to share the memory without interfering with one another.
Therefore, there is a need in the art for an apparatus and method of performing nested speculative regions for a synchronization facility.